You cannot print a line finer than the light you print it with. The chip industry has been doing exactly that for twenty years

There is a rule in optics that anyone who has used a microscope has met: you cannot resolve detail much finer than the wavelength of the light you are using. Try to project a pattern smaller than that and diffraction blurs it into mush.

The circuits in a modern processor have features far smaller than the wavelength of the light that printed most of them, for about twenty years now. This was not achieved by discovering a loophole in physics. It was achieved by a sequence of increasingly elaborate refusals to accept the consequence — and the story of how is the most consequential manufacturing effort currently running anywhere.

The equation that governs everything

Lithography projects the image of a mask — a patterned plate carrying the circuit layout — through a lens onto a wafer coated with a light-sensitive film. Where light lands, the film's solubility changes; develop it away and the pattern is transferred into the material beneath.

How small a feature that can produce is captured in one relationship: the smallest printable dimension is proportional to the wavelength divided by the numerical aperture of the lens, multiplied by a process factor that engineering can push down only so far. There are exactly three levers, and only three.

Numerical aperture can be increased, but lens design runs into hard physical limits. The process factor has a floor for a single exposure that was reached long ago. That leaves wavelength — and the industry marched down it for decades, from mercury-lamp lines in the ultraviolet to 248 nanometres, then to 193 nanometres from an argon fluoride laser.

Then it stopped. Below 193 nm, the materials that lenses are made from stop being transparent. The next candidate wavelength had no workable optics at all. And the industry sat at 193 nm for roughly twenty years while feature sizes carried on shrinking by more than a factor of ten.

Two decades of cheating

The first trick was immersion. Numerical aperture depends on the refractive index of whatever sits between the lens and the wafer, and air has an index of one. Fill that gap with ultrapure water, index about 1.44, and the effective wavelength drops to roughly 134 nm without changing the light source at all. A machine costing tens of millions of dollars was redesigned to hold a controlled puddle of water beneath the lens while the wafer moves under it at high speed, without bubbles, without leaving a drop behind. It bought several generations.

The second trick was multiple patterning, and it is the one that shows how desperate the situation had become. If you cannot print lines close enough together, print half of them, process the wafer, and print the other half in between. Or deposit a thin film on the sides of a printed line, remove the original, and keep the two sidewalls — which are now two features where there was one, at half the original spacing, and the spacing was set by film thickness rather than by optics.

Both work. Both are expensive in exactly the way that matters: each layer now needs two, three or four passes through the most costly tool in the factory, each pass must align to the previous one within a couple of nanometres, and every extra step is another opportunity for a defect. By the mid-2010s the cost of the workaround was becoming the dominant problem.

Why the new wavelength needed a new kind of machine

The answer was to jump all the way to extreme ultraviolet at 13.5 nanometres. The difficulty is that EUV light is absorbed by essentially everything — air, glass, water, any material you would like to make a lens from. You cannot refract it. You cannot even let it travel through a room.

So an EUV machine is not a modified optical system; it is a different category of object. The entire light path runs in vacuum. Every optical element is a mirror, and since no material reflects EUV at a useful angle by itself, each mirror is a precisely engineered stack of dozens of alternating nanometre-thin layers that reflect by interference — and even then returns only around two-thirds of the light. Put ten such mirrors in the path and a small fraction of what you generated reaches the wafer. Those mirrors are among the flattest objects ever manufactured; scaled up to the size of a country, the deviations would be measured in millimetres.

Generating the light is stranger still. A stream of molten tin droplets is fired across a vacuum chamber tens of thousands of times a second. Each droplet is hit by a laser pulse that flattens it, then by a second, far more powerful pulse that turns it into a plasma hot enough to radiate at 13.5 nm. The debris from that plasma must be kept off the collecting mirror sitting a few centimetres away. This runs continuously, in a factory, for years.

Every generation of this technology has been the same move: the physics said stop, and the response was to change what the machine fundamentally is rather than accept the limit.

The problem that arrives when photons become countable

Shrinking features produces a failure mode that does not exist at larger scales, and it is a good illustration of why nanoscale manufacturing is its own discipline.

Exposure is not a smooth flood of light. It is a finite number of photons arriving at random positions and times, and EUV photons carry high energy, so a correct dose consists of relatively few of them. In a feature a few nanometres across, the number of photons that happen to land there is small enough that statistical fluctuation becomes significant. Two identical features on the same wafer receive measurably different doses purely by chance.

The consequences are stochastic defects: a contact hole that fails to open, a line that pinches closed, a bridge between two lines that should be separate. They are not caused by contamination or misalignment. They are caused by randomness, they cannot be engineered away entirely, and they are now a leading concern in yield at the smallest dimensions. Raising the dose reduces them and slows the machine down, which is a direct trade between throughput and defect rate.

Resolution is only half the job

There is a second requirement that gets far less attention and is just as hard. A finished chip is dozens of patterned layers, and each must sit on the one below it within a small fraction of a feature size — an error budget of a couple of nanometres, maintained across a wafer 300 millimetres wide, while the wafer has been heated, coated, etched and polished between exposures.

That is overlay, and it is why these machines are as much precision mechanics as optics: wafer stages that accelerate hard and settle to nanometre accuracy, interferometric position measurement, and correction models that compensate for the wafer having distorted slightly since the previous layer was printed. A perfectly resolved pattern placed two nanometres off is a dead chip.

What the node name is not

One thing follows from all this and is worth stating plainly. When a process is called "3 nm", nothing on the chip measures three nanometres. Node names stopped corresponding to any physical dimension somewhere around the 22 nm generation and are now essentially product names indicating a generation of density and performance. The actual smallest printed dimensions are considerably larger, and the density gains increasingly come from device architecture and from packaging rather than from printing finer lines.

Why it matters for students and researchers

Every EUV machine in the world comes from a single manufacturer, built from a supply chain of specialist firms scattered across several countries, and there is no second source. That fact shapes trade policy, industrial strategy and the current geopolitics of semiconductors more than any individual company does — and it is worth understanding as an engineering fact rather than a political one.

For students, lithography is the clearest demonstration available that manufacturing is where physics becomes difficult. The device physics of a transistor is undergraduate material. Printing a hundred billion of them, aligned to each other within nanometres, with a defect rate low enough that most of the chips work, is where the genuine problems live: optics, plasma physics, precision mechanics, materials chemistry, metrology and statistics, all at once.

India's semiconductor programme starts at assembly and test rather than at leading-edge lithography, and that ordering is reasonable — but the same discipline scales down. Photolithography at more modest resolutions is what makes MEMS sensors, power devices, photonics and microfluidic chips, and those are accessible, useful and genuinely under-taught. The interesting question for anyone entering the field is not whether India will print 3 nm logic. It is who can run a patterning process well enough to hold a specification, which is a skill that transfers across every one of those applications.

Frequently asked questions

How are computer chips actually printed?

A patterned mask is illuminated and its image projected through a lens onto a wafer coated in light-sensitive resist. The exposed resist is developed away, the pattern is etched into the material beneath, and the cycle repeats for dozens of layers.

How can features be smaller than the wavelength of light used?

Through a series of workarounds rather than an exception to physics: immersing the gap in water to raise the numerical aperture, splitting one layer across two or more exposures, and using sidewall films to create features at half the printed spacing.

Why does EUV lithography need mirrors and vacuum?

Because 13.5 nm light is absorbed by air, glass and every lens material, so it cannot be refracted or allowed to travel through atmosphere. The entire optical path runs in vacuum using multilayer mirrors that reflect by interference.

What are stochastic defects?

They are failures caused by the random arrival of photons. At the smallest feature sizes the number of photons landing on a feature is small enough that chance variation alone can close a line or leave a contact unopened.

Does a 3 nm chip have 3 nm features?

No. Node names stopped describing physical dimensions around the 22 nm generation and now indicate a technology generation. The smallest printed features are substantially larger, and much of the improvement comes from device structure and packaging.